PCI bus signal Specification

PCI Bus Command and Byte Enables. 
During the address phase of a transaction C/BE[3:0]# define the bus command.During the data phase C/BE[3:0]# are used as Byte Enables.

Frame Signal. 
FRAME# is driven by the current PCI bus master to indicate the beginning and duration of an access.

Initialization Device Select. 
IDSEL is used as a chip select during configuration read and write transactions. This signal should be externally tied to one of the upper 21 address signals.

Bus Stop#. 
STOP# indicates the current target is requesting the master to stop the current PCI bus transaction.

Initiator Ready. 
IRDY# indicates the initiating agent ability to complete the current data phase of the PCI bus transaction.

Target Ready. 
TRDY# indicates the target agent ability to complete the current data phase of the PCI bus transaction.

Device Select. 
DEVSEL# to indicate that it is the target of the current PCI bus transaction. 

System Error. 
SERR# can be pulsed active by any PCI agent that detects a system error  condition.

Parity Signal. 
Generates even parity across AD[31:0] and C/BE[3:0]#.

PCI Reset.
Receives PCIRST# as a reset from the PCI Bus.